Kioxia and Sandisk Unveils Next-Gen 3D Flash Memory Technology Achieving 4.8Gb/s NAND Interface Speed

Kioxia Corporation and Sandisk Corporation have pioneered a state-of-the-art 3D flash memory technology, setting the industry benchmark with a 4.8Gb/s NAND interface speed, superior power efficiency, and heightened density.

Unveiled at ISSCC 2025, this 3D flash memory innovation, together with the companies’ revolutionary CBA (CMOS directly Bonded to Array) technology ⁽¹⁾, incorporates 1 of the latest interface standards, Toggle DDR6.0 for NAND flash memory, and leverages the SCA (Separate Command Address) protocol ⁽²⁾, a novel command address input method of its interface, and PI-LTT (Power Isolated Low-Tapped Termination) technology ⁽³⁾, which is instrumental in further reducing power consumption.

Leveraging this unique high-speed technology, the companies expect the new 3D flash memory to achieve a 33% improvement in NAND interface speed compared with their 8^th Gen 3D flash memory currently in mass production, reaching a 4.8Gb/s interface speed. The technology can also deliver enhanced power efficiency of data input/output, reducing power consumption by 10% for input and 34% for output, thereby achieving a balance of high performance and low power consumption. Previewing the 10^th Gen 3D flash memory, the companies detailed that by increasing the number of memory layers to 332 and optimizing the floor plan for increased planar density, the technology improves bit density by 59%.

Hideshi Miyajima, CTO, Kioxia, said, “With the proliferation of AI technologies, the amount of data generated is projected to increase significantly and so is the need for increased power efficiency in the modern data center. Kioxia strongly believes that this new technology will enable larger capacity, higher speed, and lower power consumption products including SSDs for future storage solutions and lay the groundwork for development of AI.”

Alper Ilkbahar, SVP, global strategy and technology, Sandisk, said, “As AI advances, customer needs for memory are becoming increasingly diverse. Through our CBA technology innovation, we aim to launch products that deliver the best mix in terms of capacity, speed, performance, and capital efficiency to cater to our customers across market segments.”

Kioxia and Sandisk also shared plans for the upcoming 9^th Gen 3D flash memory. Enabled by their unique CBA technology, the companies can combine the new CMOS technology with an existing memory cell technology to deliver capital-efficient, high-performance, low-power products. Both companies remain committed to developing cutting-edge flash memory technologies, offering tailored solutions to meet customer needs, and contributing to the advancement of the digital society.

⁽¹⁾ Technology wherein each CMOS wafer and cell array wafer are manufactured separately in their optimized condition and then bonded together.
⁽²⁾ Technology wherein the bus for Command/Address input and the bus for data transfer are completely separated into different buses and are used in parallel. This reduces data input/output time.
⁽³⁾ Technology wherein power sources for existing 1.2V and additional lower voltage are utilized for the NAND interface power source. This reduces power consumption during data input/output.