R&D: HM-ORAM, Lightweight Crash-consistent ORAM Framework on Hybrid Memory System
Authors propose HM-ORAM framework, which includes novel ORAM tree-level partition scheme, lightweight data persistency architecture, and secure access protocol.
This is a Press Release edited by StorageNewsletter.com on February 12, 2025 at 2:00 pmACM Transactions on Storage has published an article written by Gang Liu, Shenzhen Institute for Advanced Study, UESTC, University of Electronic Science and Technology of China, Shenzhen, China, Zheng Xiao, College of Information Science and Engineering, Hunan University, Changsha, China, kenli Li, College of Information Science and Engineering, Hunan University, Changsha, China, and Rujia Wang, Illinois Institute of Technology, Chicago, USA.
Abstract: “Byte-addressable non-volatile memory (NVM) is a promising alternative technology for main memory, allowing the processor to access persistent data in the main memory directly. Systems with emerging NVM as the main memory still suffer from information leakage, performance, and endurance challenges. Fortunately, Oblivious RAM (ORAM) provides provable secure address obfuscation and encryption and can be used to build a secure memory system. However, it is challenging to support crash consistency with the increasing use of NVM as persistent memory. Current state-of-the-art PS-ORAM systems are designed based on pure NVM memory systems, which suffer from low performance. Different from the previous PS-ORAM system, in this work, we consider a hybrid memory system (both NVM and DRAM) and aim to build a crash-consistent ORAM framework with low overhead. We propose the HM-ORAM framework, which includes a novel ORAM tree-level partition scheme, a lightweight data persistency architecture, and a secure access protocol. It makes full advantage of both hybrid memory technologies to achieve the design requirements to support crash consistency and persistence of ORAM systems with minimal write overhead. Without compromising security, HM-ORAM can outperform an NVM-based ORAM (i.e., NVM-ORAM) system by 1.23 × and 1.39 × in non-recursive and recursive implementations.“