Intel NDTM US Assigned Patent
Smart prologue for NVM program operation
By Francis Pelletier | October 3, 2024 at 2:00 pmIntel NDTM US LLC, Santa Clara, CA, has been assigned a patent (12046303) developed by Chava; Pranav, Madraswala; Aliasgar S., Upadhyay; Sagar, and Venkataramaiah; Bhaskar, Folsom, CA, for a “smart prologue for nonvolatile memory program operation.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “For a nonvolatile (NV) storage media such as NAND (not AND) media that is written by a program and program verify operation, the system can apply a smart prologue operation. A smart prologue operation can selectively apply a standard program prologue, to compute program parameters for a target subblock. The smart prologue operation can selectively apply an accelerated program prologue, applying a previously-computed program parameter for a subsequent subblock of a same block of the NV storage media. Application of a prior program parameter can reduce the need to compute program parameters for the other subblocks.”
The patent application was filed on 2020-06-08 (16/895890).