Flash Memory Summit: NEO Semiconductor to Present 3D NAND and 3D DRAM Architectures

NEO Semiconductor announced its participation at Flash Memory Summit 2023, taking place in Santa Clara, CA, on August 8-10.

3D X-DRAM can increase onboard HBM density for AI chips

Andy Hsu, CEO, will deliver a keynote address titled New Architectures which will Drive Future 3D NAND and 3D DRAM Solutions on August 9.

Earlier this year, the company announced the launch of its technology, 3D X-DRAM. This development is the first 3D NAND-like DRAM cell array that is targeted to solve DRAM’s capacity bottleneck and replace the entire 2D DRAM market. 3D X-DRAM can be manufactured using the existing 3D NAND flash memory process with minor changes, reducing the time and cost spent developing a new 3D process. During the keynote, Hsu will reveal the 3D X-DRAM process flow and technical details.

A new AI application for 3D X-DRAM called ‘Local Computing’ will be disclosed, increasing AI chip performance to a new level. Also, the company will show other new memory structures derived from 3D X-DRAM for 3D NOR flash memory, 3D Ferroelectric RAM (FFRAM), 3D Resistive RAM (RRAM), 3D Magnetoresistive RAM (MRAM), and 3D Phase Change Memory (PCM). These memory structures will bring technological breakthroughs for migrating these memory cells from 2D into 3D.

“I’m truly looking forward to sharing our newest ground-breaking architectures at Flash Memory Summit 2023 that create unprecedented value for semiconductor companies manufacturing memory products, cloud providers and enterprise companies implementing storage solutions,” said Hsu, founder and CEO, NEO Semiconductor and technology inventor with more than 120 U.S. patents. “A new DRAM structure, leveraging 3D design, is urgently needed to overcome scaling issues. 3D X-DRAM provides a high-speed, high-density, low-cost, and high-yield solution that will ignite a new generation of applications and services for the future.”

DRAM and NAND flash memory are 2 of the most important types of memory in computer and electronic systems. In the past 30 years, DRAM and NAND flash have successfully migrated through many gens to enhance system performance. However, in the recent AI era, DRAM has suffered from capacity scaling limits, and NAND flash has suffered from low-speed performance. These 2 issues need to be urgently addressed to meet the requirement of AI applications. In his keynote, Hsu will address these challenges and present 2 innovative technologies – 3D X-DRAM and 3D X-NAND – to overcome these challenges.