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Mellanox Technologies/Nvidia Assigned Two Patents

Secure flash controller, computational accelerator for storage operations

Secure flash controller
Mellanox Technologies, Ltd. (acquired by Nvidia Corp.), Yokneam, Israel, has been assigned a patent (11681635) developed by Itkin, Yuval, Zoran, Israel, Strassberg, Yaniv, Yokneam, Israel, Harel, Guy, Haifa, Israel, and Atamlh, Ahmad, Oxford, Great Britain, for a secure flash controller.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A computing device includes a non-volatile memory (NVM) interface and a processor. The NVM interface is configured to communicate with an NVM. The processor is configured to store in the NVM Type-Length-Value (TLV) records, each TLV record including one or more encrypted fields and one or more non-encrypted fields, the non-encrypted fields including at least respective validity indicators of the TLV records, to read the TLV records that include the encrypted fields and the non-encrypted fields from the NVM, and to invalidate selected TLV records by modifying the respective validity indicators of the selected TLV records that are stored in the non-encrypted fields.

The patent application was filed on 2020-09-07 (17/013693).

Computational accelerator for storage operations
Mellanox Technologies, Ltd., (acquired by Nvidia Corp.), Yokneam, Israel, has been assigned a patent (11683266) developed by Pismenny, Boris, Haifa, Israel, Menes, Miriam, Tel Aviv, Israel, Burstein, Idan, Akko, Israel, Liss, Liran, Atzmon, Israel, Bloch, Noam, Bat Shlomo, Israel, and Shahar, Ariel, Jerusalem, Israel, for a computational accelerator for storage operations.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A system includes a host processor, which has a host memory and is coupled to store data in a non-volatile memory in accordance with a storage protocol. A network interface controller (NIC) receives data packets conveyed over a packet communication network from peer computers containing, in payloads of the data packets, data records that encode data in accordance with the storage protocol for storage in the non-volatile memory. The NIC processes the data records in the data packets that are received in order in each flow from a peer computer and extracts and writes the data to the host memory, and when a data packet arrives out of order, writes the data packet to the host memory without extracting the data and processes the data packets in the flow so as to recover context information for use in processing the data records in subsequent data packets in the flow.

The patent application was filed on 2022-10-11 (17/963216).

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