The Charles Stark Draper Laboratory Assigned Patent

The Charles Stark Draper Laboratory, Inc., Cambridge, MA, has been assigned a patent (11636046) developed by Tran, Nhut, Natick, MA, Prince, J. Ryan, Stow, MA, and Klingensmith, Martin, Arlington, MA, for “latency free data encryption and decryption between processor and memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An embodiment is directed to a hardware circuit for encrypting and/or decrypting data transmitted between a processor and a memory. The circuit is situated between the processor and memory. The circuit includes a first interface communicatively coupled to the processor via a set of buses. The circuit also includes a second interface communicatively coupled to the memory. The circuit further includes hardware logic capable of executing an encryption operation on data transmitted between the processor and memory, without adding latency to data transmission speed between the processor and the memory. The hardware logic is configured to encrypt data received at the first interface from the processor, and transmit the encrypted data to the memory via the second interface. The hardware logic is also configured to decrypt data received at the second interface from the memory, and transmit the decrypted data to the processor via the first interface.”

The patent application was filed on 2019-11-15 (16/685600).