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Skyechip Assigned Patent

Memory controller and method for memory scheduling of storage device

Skyechip SDN BHD, Bayan Lepas, Malaysia, has been assigned a patent (11609709) developed by Teh, Chee Hak, and Ong, Yu Ying, Bayan Lepas Pulau Pinang, Malaysia, for memory controller system and a method for memory scheduling of a storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory controller system comprising a scheduling module, a data buffer module, a global order buffer module and a linked-list controlling module. The linked-list controlling module is configured to receive and process a first command comprising a write command or a read command. The linked-list controlling module constructs at least one linked-list head based on scheduling dependencies and determines whether the first command is dependency-hit by comparing the first command with the existing commands buffered in the global order buffer module. If the first command is dependency-hit, the linked-list controlling module is configured to trigger a write merging process or a read snarfing process.

The patent application was filed on 2021-01-05 (17/141723).

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