Zeno Semiconductor Assigned Three Patents

Semiconductor memory having both volatile and non-volatile functionality
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (11488665) developed by Widjaja; Yuniarto, Cupertino, CA, for a “semiconductor memory having both volatile and non-volatile functionality and method of operating.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Semiconductor memory having both volatile and non-volatile modes and methods of operation. A semiconductor storage device includes a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory. The device includes a floating gate or trapping layer for storing data as non-volatile memory, the device operating as volatile memory when power is applied to the device, and the device storing data from the volatile memory as non-volatile memory when power to the device is interrupted.”

The patent application was filed on 2020-11-03 (17/087884).

Memory device comprising electrically floating body transistor and methods
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (11489073) developed by Han, Jin-Woo, San Jose, CA, Maheshwari, Dinesh, Fremont, CA, and Widjaja, Yuniarto, Cupertino, CA, for a “memory device comprising an electrically floating body transistor and methods of operating.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A semiconductor memory cell comprising an electrically floating body having two stable states is disclosed. A method of operating the memory cell is disclosed.”

The patent application was filed on 2020-11-09 (17/092659).

Compact semiconductor memory device having reduced number of contacts
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (11488955) developed by Widjaja, Yuniarto, Cupertino, CA, for a “compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or string includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.”

The patent application was filed on 2021-05-18 (17/323727).