ScaleFlux Assigned Four Patents

Realizing high-speed and low-latency RAID across multiple solid-state storage device with host-side FTL
ScaleFlux, Inc., San Jose, CA, has been assigned a patent (11,347,586) developed by Wu, Qi, San Jose, CA, for “realizing high-speed and low-latency RAID across multiple solid-state storage device with host-side FTL.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for implementing a RAID group in a system including a host computing system, a first set of storage devices for storing user data for the RAID group, and a second set of storage devices for storing redundancy data for the RAID group. The method includes: distributing the user data from a host-side FLT module on the host computing system to the first set of storage devices; determining, by each storage device in the first set of storage devices, a logical block address to physical block address (LBA-PBA) binding for the user data received from the host-side FLT module; sending LBA-PBA binding information for the LBA-PBA binding from the first set of storage devices to the host-side FLT module; and performing, by the host-side FLT module, RAID encoding to form the RAID group based on the LBA-PBA binding information received from the first set of storage devices.”

The patent application was filed on July 25, 2019 (16/521,703).

Enhance storage devices with built-in transparent compression for mitigating out-of-space issues
ScaleFlux, Inc., San Jose, CA, has been assigned a patent (11,347,422) developed by Li, Jiangpeng,Zhang, Dong, San Jose, CA, Peng, Yong, and Liu, Yang, Milpitas, CA, for “techniques to enhance storage devices with built-in transparent compression for mitigating out-of-space issues.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage device that provides in-storage transparent compression and implements a process for processing write requests during an out-of-space state. The process includes: receiving a write request from a host involving a set of logical block addresses (LBAs), determining if each of the LBAs in the write request is an actively used LBAs, and in response to determining that each of the LBAs in the write request are actively used LBAs, allowing the write request to be served, and in response to determining that at least one of the LBAs in the write request is not an actively used LBAs, not allowing the write request to be served and returning an error to the host.”

The patent application was filed on March 3, 2021 (17/191,002).

Using in-storage computation to improve performance of hash join for database and data analytics
ScaleFlux, Inc., San Jose, CA, has been assigned a patent (11,301,476) developed by Zhang, Tong, Albany, NY, Liu, Yang, Milpitas, CA, Sun, Fei, Irvine, CA, and Zhong, Hao, Los Gatos, CA, for “using in-storage computation to improve the performance of hash join for database and data analytics.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method according to embodiments includes: storing an entire hash table of a table R in memory of a computational storage device, storing a second table S in storage media of the computational storage device, the table R being smaller than the table S, wherein the hash JOIN operation is directed to combining a c.sub.s-th column in the table S and a c.sub.r-th column in the table R, wherein, for each row of the table S, the computational storage device configured to perform a method, including: applying a hash function to a value of the c.sub.s-th column to provide a hash result, looking up the hash result in the hash table stored in the memory of the computational storage device, and if the hash result is found, sending the row of the table S and a corresponding row index of the table R to the host computing system.”

The patent application was filed on July 17, 2019 (16/513,805).

Integrating host-side storage management with host-side non-volatile memory
ScaleFlux, Inc., San Jose, CA, has been assigned a patent (11,262,942) developed by Wu, Qi, San Jose, CA, Wu, Wentao, Milpitas, CA, Omura, Thad, Los Altos, CA, Liu, Yang, Milpitas, CA, and Zhang, Tong, Albany, NY, for “integrating host-side storage device management with host-side non-volatile memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “The present disclosure relates to the field of solid-state data storage, and particularly to improving the speed performance and reducing the cost of solid-state data storage devices. A host-managed data storage system according to embodiments includes a set of storage devices, each storage device including a write buffer and memory, and a host coupled to the set of storage devices, the host including: a storage device management module for managing data storage functions for each storage device, memory including: a front-end write buffer, a first mapping table for data stored in the front-end write buffer, and a second mapping table for data stored in the memory of each storage device.”

The patent application was filed on July 12, 2019 (16/509,626).