IBM Assigned Ten Patents
On phase change memories
By Francis Pelletier | April 18, 2022 at 2:00 pmProjected phase change memory devices
IBM Corp., Armonk, NY, has been assigned a patent (11,283,015) developed by Philip, Timothy Mathew, Albany, NY, Saulnier, Nicole, Slingerlands, NY, and Clevenger, Lawrence A., Saratoga Springs, NY, for “projected phase change memory devices.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method of forming a phase change memory device is provided. The method includes forming a spacer layer on a substrate, and forming a heater terminal contact in the spacer layer. The method further includes forming a liner layer on the heater terminal contact and the spacer layer, and forming a heater terminal in electrical contact with the heater terminal contact in the liner layer. The method further includes forming a conductive projection segment on the heater terminal. The method further includes forming a phase change material layer on the conductive projection segment, and forming a phase change material terminal on the phase change material layer, wherein an electrical current can pass between the heater terminal and the phase change material terminal through the phase change material layer.”
The patent application was filed on March 24, 2020 (16/828,328).
Phase change memory using multiple phase change layers and multiple heat conductors
IBM Corp., Armonk, NY, has been assigned a patent (11,271,151) developed by Ok, Injo, Loudonville, NY, Pranatharthiharan, Balasubramanian, Watervliet, NY, Brew, Kevin W., Albany, NY, and Wang, Wei, Yorktown Heights, NY, for a “phase change memory using multiple phase change layers and multiple heat conductors.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method is presented for reducing a reset current for a phase change memory (PCM). The method includes forming a bottom electrode, constructing a PCM cell structure including a plurality of phase change memory layers and a plurality of heat transfer layers, wherein the plurality of phase change memory layers are assembled in an alternating configuration with respect to the plurality of heat transfer layers, and forming a top electrode over the PCM cell structure. The plurality of phase change memory layers are arranged perpendicular to the top and bottom electrodes. Additionally, airgaps are defined adjacent the PCM cell structure.”
The patent application was filed on June 12, 2019 (16/438,906).
Phase change memory
IBM Corp., Armonk, NY, has been assigned a patent (11,264,569) developed by Ok, Injo, Loudonville, NY, Brew, Kevin W., Philip, Timothy M., Albany, NY, Sankarapandian, Muthumanickam, Mehta, Sanjay C., Niskayuna, NY, Saulnier, Nicole, Slingerlands, NY, and Mcdermott, Steven M., Wynantskill, NY, for a “phase change memory device.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A phase change material memory device is provided. The phase change material memory device includes one or more electrical contacts in a substrate, and a dielectric cover layer on the electrical contacts and substrate. The phase change material memory device further includes a lower conductive shell in a trench above one of the one or more electrical contacts, and an upper conductive shell on the lower conductive shell in the trench. The phase change material memory device further includes a conductive plug filling the upper conductive shell. The phase change material memory device further includes a liner layer on the dielectric cover layer and conductive plug, and a phase change material block on the liner layer on the dielectric cover layer and in the trench.”
The patent application was filed on November 1, 2019 (16/671,748).
Integrated reactive material erasure element with phase change memory
IBM Corp., Armonk, NY, has been assigned a patent (11,257,866) developed by BrightSky, Matthew J., Armonk, NY, Cabral, Jr., Cyril, Yorktown Heights, NY, and Rodbell, Kenneth P., Sandy Hook, CT, for an “integrated reactive material erasure element with phase change memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A reactive material erasure element comprising a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.”
The patent application was filed on November 22, 2019 (16/692,586).
Suppressing outlier drift coefficients while programming phase change memory synapses
IBM Corp., Armonk, NY, has been assigned a patent (11,183,238) developed by Burr, Geoffrey, San Jose, CA, for “suppressing outlier drift coefficients while programming phase change memory synapses.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A computer-implemented method for suppressing outlier drift of a phase change memory (PCM) device includes programming, by a controller, a conductance of the PCM device, wherein the programming includes configuring the conductance of the PCM device to a first conductance value at a first time-point, the first time-point being a programming time-point. The programming further includes determining, at a first pre-compensation time-point, that the conductance of the PCM device has changed to a second conductance value that differs from a target conductance value by no more than a predetermined threshold. Further, the programming includes, based on the above determination, reprogramming the PCM device to the first conductance value at a second time-point, including measuring said pre-compensation again, but at a second pre-compensation time-point.”
The patent application was filed on August 28, 2019 (16/554,018).
Compensating PCM drift for neuromorphic applications
IBM Corp., Armonk, NY, has been assigned a patent (11,164,628) developed by Li, Ning, White Plains, NY, Kim, Wanki, Chappaqua, NY, Bedell, Stephen W., Wappingers Falls, NY, and Sadana, Devendra K., Pleasantville, NY, for “compensating PCM drift for neuromorphic applications.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus includes an analog phase change memory array, including an array of cells addressable and accessible through first lines and second lines. The apparatus includes device(s) coupled to one or more of the first lines. The device(s) is/are able to be coupled to or decoupled from the one or more first lines to compensate for phase change memory resistance drift in resistance of at least one of the cells in the one or more first lines. The apparatus may also include control circuitry configured to send, using the first lines and second lines, a same set pulse through the device(s) to multiple individual phase change memory resistors in the phase change memory array sequentially once every period.”
The patent application was filed on February 21, 2020 (16/797,626).
Writing multiple levels in phase change memory
IBM Corp., Armonk, NY, has been assigned a patent (11,152,063) developed by Lam, Chung H., Peekskill, NY, Lewis, Scott C., Essex Junction, VT, Maffitt, Thomas M., Burlington, VT, and Morrish, Jack, Shelburne, VT, for “writing multiple levels in a phase change memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory.”
The patent application was filed on July 30, 2019 (16/526,303).
Phase change memory with conductive bridge filament
IBM Corp., Armonk, NY, has been assigned a patent (11,145,814) developed by Gong, Nanbo, White Plains, NY, Ando, Takashi, Tuckahoe, NY, and Cohen, Guy M., Ossining, NY, for a “phase change memory with conductive bridge filament.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and structures for fabricating a semiconductor device that includes a reduced programming current phase change memory (PCM) are provided. The method includes forming a bottom electrode. The method further includes forming a PCM and forming a conductive bridge filament in a dielectric to serve as a heater for the PCM. The method also includes forming a top electrode.”
The patent application was filed on August 12, 2019 (16/538,262).
On-chip security key with phase change memory
IBM Corp., Armonk, NY, has been assigned a patent (11,081,172) developed by Cheng, Kangguo, Schenectady, NY, Radens, Carl, LaGrangeville, NY, Xie, Ruilong, Niskayuna, NY, and Li, Juntao, Cohoes, NY, for an “on-chip security key with phase change memory.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method is presented for forming an on-chip security key. The method includes electrically connecting a pair of phase change memory (PCM) elements in series, electrically connecting a programming transistor to the pair of PCM elements, electrically connecting an input of an inverter to a common node of the pair of PCM elements, setting the PCM elements to a low resistance state (LRS) in an initialization stage, applying a RESET pulse to generate a security bit and to cause one of the PCM elements to change to a high resistance state (HRS), and generating a logic ‘1’ or ‘0’ at the output of the inverter.”
The patent application was filed on April 2, 2020 (16/838,157).
Phase change memory cell with metal layer
IBM Corp., Armonk, NY, has been assigned a patent (11,038,106) developed by Radens, Carl, LaGrangeville, NY, Cheng, Kangguo, Schenectady, NY, Li, Juntao, Cohoes, NY, and Xie, Ruilong, Niskayuna, NY, for a “phase change memory cell with a metal layer.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method may include filling a via opening with a spacer, the via opening formed in a dielectric layer, forming a trench within the spacer, filling the trench with a metal layer, recessing the spacer to form an opening and expose an upper portion of the metal layer, wherein the exposed portion of the metal layer is formed into a cone shaped tip, conformally depositing a liner along a bottom and a sidewall of the opening and the exposed portion of the metal layer, depositing a second dielectric layer along the bottom of the opening on top of the liner, recessing the liner to form a channel and partially exposing a sidewall of the second dielectric layer and a sidewall of the metal layer, depositing a third dielectric layer in the channel, and depositing a phase change memory layer within the opening.”
The patent application was filed on November 22, 2019 (16/691,646).