Global Uniship and TMSC Assigned Two Patents

Solid-state storage
Global Uniship Corp. Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, Taiwan, has been assigned a patent (11,201,100) developed by Shih, Yu-Ting, Hung, Chen-Wei, and Chen, Jia-Liang, Hsinchu, Taiwan, for a “solid-state storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A solid-state storage device includes a housing, a wiring board and a semiconductor package unit. The housing is formed with a heat-dissipating recess thereon. The wiring board is fixed in the housing. One side of the semiconductor package unit is mounted on the wiring board, and the other side of the semiconductor package unit is embedded in the heat-dissipating recess. A top surface and lateral surfaces surrounding the top surface of the semiconductor package unit are all thermally connected to the housing in the heat-dissipating recess.”

The patent application was filed on May 22, 2018 (15/985,727).

Interface method for 3D semiconductor
Global Uniship Corp. Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, Taiwan, has been assigned a patent (11,031,923) developed by Elkanovich, Igor, Parnass, Amnon, Yu, Pei, Yeh, Li-Ken, Fang, Yung-Sheng, Lin, Sheng-Wei, Huang, Tze-Chiang, Tam, King Ho, and Chen, Ching-Fang, Hsinchu, Taiwan, for “interface device and interface method for 3D semiconductor device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An interface device and an interface method for interfacing between a master device and a slave device is provided. The master device generates command and the slave device generates data according to the command. The interface device includes a master interface and a slave interface. The master interface is coupled to the master device and configured to send the command to the slave device and/or receive the data from the slave device. The slave interface is coupled to the slave device and configured to receive the command from the master device and/or send the data to the master device. The master interface and the slave interface are driven by a clock generated by a clock generator. The master interface and the slave interface are electrically connected by one or plurality of bonds and/or TSVs.”

The patent application was filed on September 30, 2020 (17/037,739).