ScaleFlux Assigned Patent

ScaleFlux, Inc., San Jose, CA, has been assigned a patent (10,901,889) developed by Wu, Qi, San Jose, CA, for “using hybrid-software/hardware based logical-to-physical address mapping to improve the data write throughput of solid-state data storage devices.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method for providing logical block address (LBA) to physical block address (PBA) binding in a storage device includes: receiving at least one thread at a hardware engine of the device controller of the storage device, each thread including data and LBAs for the data, writing the data into a write buffer of the storage device, binding, by the hardware engine of the device controller, a sequence of contiguous PBAs for a section of the memory to the LBAs for the data in the write buffer, determining if the write buffer contains enough data for the section of the memory, and if the write buffer contains enough data for the section of the memory, writing the data to the section of the memory.”

The patent application was filed on July 25, 2019 (16/521,711).