BitMain Assigned Patent

BitMain, Inc., San Jose, CA, has been assigned a patent (10,878,857) developed by Holm, Peter Douglas, Seattle, WA, for “dynamic data storage element, and integrated circuit having the same.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device includes a dynamic latch circuit. The dynamic latch circuit includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a second PMOS transistor. A source terminal of the first NMOS transistor is connected to a source terminal of the first PMOS transistor to form a data input terminal. A drain terminal of the first NMOS transistor is connected to a drain terminal of the first PMOS transistor to form a latch internal node. A gate terminal of the first NMOS transistor is connected to a clock input signal. A gate terminal of the first PMOS transistor is connected to an inverse clock input signal. A gate terminal of the second NMOS transistor and a gate terminal of the second PMOS transistor are connected to the latch internal node. A drain terminal of the second NMOS transistor and a drain terminal of the second PMOS transistor are connected to form an inverted output terminal.”

The patent application was filed on November 4, 2019 (16/673,124).