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Zeno Semiconductor Assigned Two Patents

Semiconductor memory having volatile and non-volatile, and multi-bit non-volatile functionality

Semiconductor memory having both volatile and non-volatile functionality
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (10,825,520) developed by Widjaja, Yuniarto, Cupertino, CA, for “semiconductor memory having both volatile and non-volatile functionality and method of operating.

The abstract of the patent published by the U.S. Patent and Trademark Office states: Semiconductor memory having both volatile and non-volatile modes and methods of operation. A semiconductor storage device includes a plurality of memory cells each having a floating body for storing, reading and writing data as volatile memory. The device includes a floating gate or trapping layer for storing data as non-volatile memory, the device operating as volatile memory when power is applied to the device, and the device storing data from the volatile memory as non-volatile memory when power to the device is interrupted.

The patent application was filed on October 3, 2019 (16/591,858).

Semiconductor memory having volatile and multi-bit non-volatile functionality
Zeno Semiconductor, Inc., Sunnyvale, CA, has been assigned a patent (10,818,354) developed by Widjaja, Yuniarto, Cupertino, CA, for a “
semiconductor memory having volatile and multi-bit non-volatile functionality and method of operating.

The abstract of the patent published by the U.S. Patent and Trademark Office states: A semiconductor memory cell, semiconductor memory devices comprising a plurality of the semiconductor memory cells, and methods of using the semiconductor memory cell and devices are described. A semiconductor memory cell includes a substrate having a first conductivity type, a first region embedded in the substrate at a first location of the substrate and having a second conductivity type, a second region embedded in the substrate at a second location of the substrate and have the second conductivity type, such that at least a portion of the substrate having the first conductivity type is located between the first and second locations and functions as a floating body to store data in volatile memory, a trapping layer positioned in between the first and second locations and above a surface of the substrate, the trapping layer comprising first and second storage locations being configured to store data as nonvolatile memory independently of one another, and a control gate positioned above the trapping layer.

The patent application was filed on January 3, 2019 (16/239,456).

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