Spin Memory Assigned Patent

Spin Memory, Inc., Fremont, CA, has been assigned a patent (10,818,331) developed by Louie, Benjamin, Fremont, CA, and Berger, Neal, Cupertino, CA, for “multi-chip module for MRAM devices with levels of dynamic redundancy registers.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A memory device comprises a memory bank comprising a plurality of memory addresses. The memory device further comprises a first level dynamic redundancy register comprising data storage elements and a pipeline bank coupled to the memory bank and the first level dynamic redundancy register, wherein the pipeline bank is configured to: (a) write a data word into the memory bank at a selected one of the plurality of memory addresses, (b) verify the data word written into the memory bank to determine whether the data word was successfully written by the write, and (c) responsive to a determination that the data word was not successfully written by the write, writing the data word into the first level dynamic redundancy register, wherein the memory bank is fabricated on a first die and further wherein the first level dynamic redundancy register is fabricated on a second die.”

The patent application was filed on February 13, 2019 (16/275,088).