R&D: High-Performance Processing-in-Memory Accelerator for Inline De-Dupe
De-dupe units in base die reduce latency and processing unit power consumption by 17.3% and 45.5%, on average, respectively, compared to conventional GPU.
This is a Press Release edited by StorageNewsletter.com on March 17, 2020 at 2:12 pmIEEE Xplore has published, in 2019 IEEE 37th International Conference on Computer Design (ICCD) proceedings, an article written by Young Seo Lee, Kyung Min Kim, Ji Heon Lee, Jeong Hwan Choi, and Sung Woo Chung, Korea University, South Korea.
Abstract: “In data centers, inline data deduplication which eliminates redundant data on the fly, is crucial to significantly reduce storage cost. However, it causes substantial performance and energy overhead due to a large number of memory accesses in the conventional GPU. In this paper, we propose a highperformance processing-in-memory accelerator for inline data deduplication, called Deduplication Unit (DU) to reduce the latency and power consumption. We place the DUs in a base die or core dies of a 3D stacked memory to improve performance. Our simulation results show that the DUs in the base die reduce the latency and processing unit power consumption by 17.3% and 45.5%, on average, respectively, compared to the conventional GPU. In addition, in our thermal simulation, peak temperature of the DU is still lower than the threshold temperature.“
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