Wolley Assigned Patent
Wear leveling of storage class memory by recording input to output group address mapping
By Francis Pelletier | August 12, 2019 at 2:33 pmWolley Inc., San Jose, CA, has been assigned a patent (10,353,812) developed by Shung, Chuen-Shen Bernard, San Jose, CA , for “apparatus and method of wear leveling of storage class memory by recording input group to output group address mapping .“
The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A method and apparatus of wear leveling control for storage class memory are disclosed. According to the present invention, whether current data to be written to a nonvolatile memory corresponds to a write cache hit is determined. If the current data to be written corresponds to the write cache hit, the current data are written to a write cache as well as to a designated location in the nonvolatile memory different from a destined location in the nonvolatile memory. If the current data to be written corresponds to a write cache miss, the current data are written to the destined location in the nonvolatile memory. If the current data to be written corresponds to the write cache miss and the write cache is not full, the current data is also written to the write cache. In another embodiment, the wear leveling control technique also includes address rotation process to achieve long-term wear leveling as well.”
The patent application was filed on November 13, 2018 (16/190,043).