GigaDevice Semiconductor Assigned Four Patents

Media for programming storage device
GigaDevice Semiconductor, Inc., Shanghai, China, Beijing, China, Hefei, China, has been assigned a patent (10,290,360) developed by Chan, Siulung, San Jose, CA , for “methods, systems, and media for programming a storage device.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Methods, systems, and machine-readable storage medium for programming a storage device are disclosed. In some embodiments, the methods include: performing a verify operation on a plurality of storage elements of the storage device to determine whether the plurality of storage elements have been programmed to a first program state, determining a first number of failing bits corresponding to the first program state based on the verify operation, comparing the first number of failing bits with a first threshold of failing bits corresponding to the first program state, and determining a second threshold of failing bits based at least in part on the first number of failing bits and the comparison, wherein the second threshold of failing bits corresponds to a second program state.”

The patent application was filed on November 02, 2015 (15/535,821).

Flash controller
GigaDevice Semiconductor, Inc., Beijing, China, has been assigned a patent (10,289,303) developed by Li, Baokui, Wang, Jinghua, and Wang, Nanfei, Beijing, China, for “flash controller and control method for flash controller.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A flash controller and a control method for the flash controller. The flash controller comprises an instruction bus interface, a data bus interface, a configuration register, an erase access filter module, a read/write access filter module and a flash control module. The read/write access filter module is configured to receive control information and determine whether the read/write access is sent to the flash control module or not. The erase access filter module is configured to receive control information and determine whether the erase access is sent to the flash control module or not. The flash control module is configured to complete an access to a flash memory. The present disclosure is used to protect programs from being stolen by a client, and also protect against a situation where companies collaboratively developing a program are able to steal programs from one another.”

The patent application was filed on January 30, 2015 (15/506,247).

NAND flash memory
GigaDevice Semiconductor, Inc., Shanghai, China, Beijing, China, Hefei, China, has been assigned a patent (10,283,175) developed by Chen, Minyi, San Jose, CA, for “NAND flash memory and status output method in NAND flash memory.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present application provides a status output method in NAND flash memory, including, setting ALE signal, CLE signal and WE#, signal wherein ALE and/or CLE signal is set to be one and WE# signal is set to be one, when a falling edge of the RE# is detected, outputting LUN status signal of the NAND flash memory. Further, there is provided a NAND flash memory, including I/O signal pins, which includes an ALE signal pin, an CLE signal pin, a WE# signal pin, and a RE# signal pin, wherein when the ALE signal output by the ALE pin and/or CLE signal output by the CLE pin is one, and WE# signal output by the WE# pin is one, once a falling edge of the RE# is detected, the LUN status signal of the NAND flash memory is detected.”

The patent application was filed on December 24, 2017 (15/853,841).

NAND flash memory with fast programming function
GigaDevice Semiconductor, Inc., Beijing, China, has been assigned a patent (10,256,244) developed by Chen, Minyi, San Jose, CA, for a “NAND flash memory with fast programming function.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A NAND flash memory including a plurality of levels of cells and a plurality of bitlines. Each bitline corresponds to a plurality of program states, the program states include an Erase-state, a highest state and a plurality of middle states, wherein the bitline voltages of the middle states during programming are between the bitline voltage of the Erase-state and the bitline voltage of the highest state during programming, and the bitline voltages of the middle states during programming are different from each other. The bitline program voltages of middle states of a NAND flash memory are controlled, thus a higher initial programming voltage of wordlines can be set without causing over-programming on the middle states of the bitlines. Therefore, program time is saved, and the programming speed is increased to achieve a fast program function.”

The patent application was filed on January 15, 2018 (15/871,181).