Western Digital Assigned Fourteen Patents
Storage device encoding and interleaving codewords to improve trellis sequence detection, soft-decision input generation for storage, storage device encoding and interleaving codewords to improve trellis sequence detection, storage device baseplate diverter and downstream spoiler, storage device employing multi-mode sensing circuitry for multiple head sensor elements, SSD control, compression and formatting of data for storage systems, providing nonvolatile storage write bandwidth using caching namespace, managing access requests to memory storage subsystem, mass storage chassis assembly configured to accommodate predetermined number of storage drive failures, self-diagnosis of device drive-detected errors and automatic diagnostic data collection, pervasive drive operating statistics on SAS drives, wrapped data storage device for reducing vibration, HAMR writer having integrated polarization rotation waveguides
By Francis Pelletier | October 15, 2018 at 2:17 pmData storage device encoding and interleaving codewords
to improve trellis sequence detection
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,063,257) developed by Chen, Yiming, Rancho Santa Margarita, CA, for a “data storage device encoding and interleaving codewords to improve trellis sequence detection.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising a storage medium. First data is encoded into a first codeword comprising a plurality of i-bit symbols, and second data is encoded into a second codeword comprising a plurality of j-bit symbols, wherein i is different than j and a first code rate of the first codeword is less than a second code rate of the second codeword. The first codeword and the second codeword are symbol interleaved to generate an interleaved codeword, and the interleaved codeword is written to the storage medium.”
The patent application was filed on May 13, 2016 (15/154,165).
Soft-decision input generation for data storage
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,061,640) developed by Lu, Guangming, Irvine, CA, Anderson, Kent D., Broomfield, CO, Krishnan, Anantha Raman, Irvine, CA, and Dahandeh, Shafa, Laguna Niguel, CA, for a “soft-decision input generation for data storage systems.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “An error management system for a data storage device can generate soft-decision log-likelihood ratios, (LLRs) using multiple reads of memory locations. Bit patterns provided by multiple reads of reference memory locations can be counted and used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.”
The patent application was filed on March 12, 2013 (13/797,943).
Storage device encoding and interleaving codewords
to improve trellis sequence detection
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,056,920) developed by Chen, Yiming, Rancho Santa Margarita, CA, and Krishnan, Anantha Raman, Foothill Ranch, CA, for a “data storage device encoding and interleaving codewords to improve trellis sequence detection.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising a storage medium. Input data is encoded according to at least one channel code constraint to generate first data and second data. The first data is encoded into a first codeword, and the second data is encoded into a second codeword, wherein a first code rate of the first codeword is less than a second code rate of the second codeword. The first codeword and the second codeword are interleaved to generate an interleaved codeword, and the interleaved codeword is written to the storage medium.”
The patent application was filed on May 17, 2016 (15/157,289).
Storage device baseplate diverter and downstream spoiler
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,056,117) developed by Chan, Andre S., Palo Alto, CA, Fu, Ta-Chang, Shindo, Hitoshi, San Jose, CA, Deguchi, Takaaki, Saratoga, CA, Kung, May Ching, and Kim, Myeong Eop, San Jose, CA, for “data storage device baseplate diverter and downstream spoiler.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A unitary enclosure base for a data storage device integrally includes a first surface beneath a bottom disk, a bypass channel formed with an entry area with a lower surface below the first surface, a second surface lower than the first surface and beneath an actuator arm that services the bottom surface of the bottom disk, and a flow diverter extending upward from the first surface and positioned upstream of the actuator arm. The diverter may be positioned relative to the bypass channel such that disk-generated gas flow is diverted into the bypass channel away from the actuator arm. The base may further include a spoiler extending upward from the first surface and positioned downstream of the actuator arm. The spoiler may be positioned to inhibit a wake effect upon the actuator arm.”
The patent application was filed on May 11, 2017 (15/592,621).
Storage device employing multi-mode sensing circuitry for multiple head sensor elements
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,056,098) developed by Rajauria, Sukumar, Schreck, Erhard, San Jose, CA, Contreras, John T., Palo Alto, CA, Poss, Joey M., Rochester, MN, Zakai, Rehan A., San Ramon, CA, Smith, Robert, and Stipe, Barry C., San Jose, CA, for a “data storage device employing multi-mode sensing circuitry for multiple head sensor elements.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device is disclosed comprising a head actuated over a disk, wherein the head comprises a first sensor element and a second sensor element. When configured into a first single-ended mode, a bias signal is applied to the first sensor element to generate a first single-ended output signal based on a response of the first sensor element, and when configured into a second single-ended mode, the bias signal is applied to the second sensor element to generate a second single-ended output signal based on a response of the first sensor element. When configured into a differential mode, the bias signal is concurrently applied to the first sensor element and the second sensor element to generate a differential output signal based on a response of the first sensor element and the second sensor element.”
The patent application was filed on November 29, 2017 (15/825,342).
SSD control
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,055,345) developed by Tomlin, Andrew J., Irvine, CA, Mullendore, Rodney N., San Jose, CA, and Jones, Justin, Irvine, CA, for “methods, devices and systems for solid state drive control.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A solid state drive controller includes a processor configured to couple to a plurality of non-volatile memory devices. The plurality of non-volatile memory devices are configured to store a plurality of system journals and a plurality of physical pages. The solid state drive controller also includes a volatile memory configured to store a logical-to-physical address translation map configured to enable the solid state drive controller to determine a physical location of at least one logical page. The processor is configured to maintain the plurality of system journals in the plurality of non-volatile memory devices, wherein each system journal defines physical-to-logical page correspondences for a predetermined range of the plurality of physical pages, and each system journal comprises an identification number that includes a portion of an address of a first physical page of the predetermined range of the plurality of physical pages.”
The patent application was filed on November 7, 2016 (15/345,100).
Compression and formatting of data for data storage systems
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,055,171) developed by Horn, Robert L., Yorba Linda, CA, for “compression and formatting of data for data storage systems.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Embodiments of compression and formatting of data for data storage systems are disclosed. In some embodiments, a data storage system can compress fixed sized data before storing it on a media and format obtained variable sized compressed data for storing on the media that typically has fixed size storage granularity. One or more modules compress the incoming host data and create an output stream of fixed sized storage units that contain compressed data. The storage units are stored on the media. Capacity, reliability, and performance are thereby increased.”
The patent application was filed on August 29, 2016 (15/250,264).
Poviding nonvolatile storage write bandwidth using caching namespace
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,048,876) developed by Espeseth, Adam Michael, McCambridge, Colin Christopher, and Dreyer, David George, Rochester, MN, for a “method for providing nonvolatile storage write bandwidth using a caching namespace.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “An apparatus for implementing an enhanced-write-bandwidth caching stream includes a memory that stores machine instructions and a processor that executes the machine instructions. The apparatus receives a first host write stream and a second host write stream that comprises latency-sensitive host write requests. The apparatus also subjects the first host write stream to host-write throttling, and exempts the second host write stream from host-write throttling. The apparatus further requires that the second host write stream invalidate logical blocks in an order corresponding to a previous order in which the respective logical blocks were previously programmed.”
The patent application was filed on September 10, 2015 (14/850,802).
Managing access requests to memory storage subsystem
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,048,875) developed by Phan, Lan D., Trabuco Canyon, CA, for “system and method for managing access requests to a memory storage subsystem.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Embodiments of this disclosure relate to improving solid-state non-volatile memory management. Embodiments improve the management of solid-state non-volatile memory by providing an execution manager responsible for controlling the timing of providing a request to a memory unit for execution. In embodiments, the execution manager traverses a list of received requests for memory access and dispatches commands for execution. In embodiments, if a request is directed to memory units which have reached a threshold for outstanding requests, the request may be skipped so that other requests can be dispatched for memory units which have not yet reached the threshold.”
The patent application was filed on October 14, 2016 (15/294,063).
Mass storage chassis assembly configured
to accommodate predetermined number of storage drive failures
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,042,730) developed by Zebian, Hussam, San Jose, CA, for a “mass storage chassis assembly configured to accommodate predetermined number of storage drive failures.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A mass storage chassis assembly configured to accommodate a predetermined number of storage drive failures is provided. The mass storage chassis assembly in one example includes a chamber, a plurality of working storage drives in the chamber, and an outside deck including one or more empty storage drive receptacles outside the chamber.”
The patent application was filed on August 19, 2014 (14/463,267).
Self-diagnosis of device drive-detected errors and automatic diagnostic data collection
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,042,688) developed by Freeman, Thomas, and Rabe, Nathan Allan, Rochester, NM, for “self-diagnosis of device drive-detected errors and automatic diagnostic data collection.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A self-diagnostic device driver includes a memory that stores machine instructions and a processor coupled to the memory that executes the machine instructions to record an operational history associated with the device driver. The processor further executes the machine instructions to detect an error associated with the device driver, remove an associated driver from service, and automatically replicate a sequence of device driver operations corresponding to a segment of the operational history immediately preceding detection of the error. The processor also executes the machine instructions to automatically record a diagnostic history associated with the device driver while replicating the sequence of device driver operations. After the sequence has been replicated, the device is returned to service.”
The patent application was filed on March 2, 2016 (15/058,834).
Pervasive drive operating statistics on SAS drives
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,042,585) developed by Erickson, Mark David, Mantorville, MN, Gerhart, Darin Edward, Oronoco, MN, and Ortmeier, Nicholas Edward, Rochester, MN, for “pervasive drive operating statistics on SAS drives.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method is described that includes generating, by a controller of a storage device, operating statistics associated with an operating state of the storage device. The method includes receiving, by the controller and from a host device, a non-interrupt command frame that requests transfer of data blocks between the storage device and the host device. The method further includes, in response to receiving the non-interrupt command frame, generating, by the controller, a response frame associated with the non-interrupt command frame, wherein the response frame includes the operating statistics. The method includes transmitting, by the controller and to the host device, the response frame.”
The patent application was filed on September 27, 2016 (15/277,545).
Wrapped data storage device for reducing vibration
Western Digital Technologies, Inc., San Jose, CA, has been assigned a patent (10,037,783) developed by Asai, Yohei, Ichikawa, Kazuhide, Fujisawa, Japan, Kawakami, Takanori, Yokohama, Japan, Namihisa, Miki, Fujisawa, Japan, and Kobayashi, Isao, Odawara, Japan, for a “wrapped data storage device for reducing vibration.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage device, (DSD) is assembled with a flexible sheet of barrier material covering at least a portion of the top cover and/or bottom base of the DSD enclosure, whereby a layer of air is between the sheet of barrier material and the cover and/or base. Polyvinlyidene chloride, (PVDC) may be used as the barrier material. A wrap-around structure may be used for the barrier material, enveloping the DSD so that an open end can be positioned open to a primary direction of airflow, such that a respective layer of air is created between the barrier material and each of the cover and/or base. An adhesive may be positioned around the outer edge of the cover and/or base, to adhere the sheet of barrier material to the respective cover and/or base while allowing the air layer to fill the space therebetween.”
The patent application was filed on December 22, 2016 (15/388,633).
HAMR writer having integrated polarization rotation waveguides
Western Digital, Fremont, LLC, Fremont, CA, has been assigned a patent (10,037,773) developed by Van Orden, Derek A., San Francisco, CA, Sochava, Sergei, Sunnyvale, CA, Mu, Jianwei, Pleasanton, CA, and Yi, Ge, San Ramon, CA, for a “heat assisted magnetic recording writer having integrated polarization rotation waveguides.“
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A heat assisted magnetic recording, (HAMR) writer is described. The HAMR writer is coupled with a laser that provides energy having a first polarization state. The HAMR writer has an air-bearing surface, (ABS) configured to reside in proximity to a media during use, a plurality of waveguides, a main pole and at least one coil. The main pole writes to the media and is energized by the coil(s). The waveguides receive the energy from the laser and direct the energy toward the ABS. The waveguides include an input waveguide and an output waveguide. The input waveguide is configured to carry light having the first polarization state. The output waveguide is configured to carry light having a second polarization state different from the first polarization state. The waveguides are optically coupled and configured to transfer the energy from the first polarization state to the second polarization state.”
The patent application was filed on May 5, 2017 (15/587,571).