R&D: Adaptive-Classification Clock: Page Replacement Policy-Based on R/W Access Pattern for Hybrid DRAM and PCM Main Memory

Microprocessors and Microsystems has published an article written by Sungho Kim, Department of Computer Engineering, Yeungnam University, Gyeongsan, Republic of Korea, Sang-Ho Hwang, Daegu Gyeongbuk Institute of Science and Technology, Daegu, Republic of Korea, and Jong Wook Kwak, Department of Computer Engineering, Yeungnam University, Gyeongsan, Republic of Korea.

Abstract: “Phase change memory (PCM) has emerged as a new main memory in embedded systems because of its attractive characteristics, which include a lower static power, higher density, byte-addressability, and non-volatility. Although PCM has various advantages, it has a longer write latency than dynamic random access memory (DRAM) and limits the write endurance in each cell. Recently, a hybrid main memory was designed that combined DRAM and PCM. In particular, the page replacement policy in this hybrid main memory has been one of the major areas of study. The previous page replacement policies had three problems when used in embedded systems: the allocation policy, read/write access pattern identification, and migration policy. This paper proposes the adaptive-classification CLOCK (AC-CLOCK) page replacement policy for the hybrid main memory of an embedded system. AC-CLOCK measures the read/write access patterns of application programs and reduces the number of write operations in PCM by tracing these patterns. In addition, it reduces the number of unnecessary page migrations from PCM to DRAM by tracking the detailed access patterns such as write intensive pages or read intensive pages. In our experiments, AC-CLOCK reduced the number of write operations in PCM by 57.87% on average and outperformed the hit ratio of write operations in the DRAM by 9.47% on average, compared with CLOCK, CLOCK-Pro, and CLOCK-DWF. Moreover, AC-CLOCK reduced the energy delay product (EDP) by 23.25% on average, compared with the previous techniques.“