Altera Assigned Patent

Altera Corporation, San Jose, CA, has been assigned a patent (9,804,843) developed by Chu, Pohrong Rita, Saratoga, CA, for a “method and apparatus for linear function processing in pipelined storage circuits.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An integrated circuit may have processing and storage circuits that perform read-modify-write operations on a wide data path. A CAD tool may partition the wide data path into data path subsets based on the width of the wide data path, the characteristics of the processing and storage circuits, and various constraints such as resource constraints and timing constraints. The CAD tool may also instantiate corresponding pipelined circuitry. The pipelined circuitry may be arranged in slices with cascaded processing and storage circuits. Each processing and storage circuit in a slice may perform a read-modify-write operation based on the corresponding data path subset and any prior result produced by other processing and storage circuits.”

The patent application was filed on September 5, 2014 (14/478,335).