Start-Up ScaleFlux in Computational Storage Subsystem
Innovative approach with embedded compute on storage board
By Philippe Nicolas | June 19, 2017 at 2:14 pmScaleFlux, Inc. was incorporated in 2014 and has two headquarters, for US in San Jose, CA, and for Asia in Beijing, China.
The company is not so visible on the market and shared recently a booth at a big data conference.
Three executives are listed on the web site:
- Hao Zhong, CEO and director, former senior director of engineering at Fusion-io, director of engineering at LSI (SandForce) and system architect at LSI (Agere)
- Jian/Jeff Wu, COO, being before at Pactera for most of his career,
- And Mr. Thad Omura, VP of business development., coming from Seagate, LSI, SandForce, Mellanox, Freescale and Marvell and advisor at Liqid.
And globally we found 18 people on LinkedIn.
According to PitchBook, ScaleFlux has raised so far $12 million in 2 rounds from 5 investors.
The company designs a software and flash-based hardware subsystem produced as a board and available in PCIe HHHL or U.2 form factor. The storage entity is built with 3D NAND chips and the final product offers variable capacities from 1.6 to 6.4TB. These devices appear as block devices for the operating system. Refer to the table below for more details.
They name this computing model, the Computational Storage Subsystem aka CSS, and they promote currently the first iteration with the 1000 Series.
The main idea is to offload and deport from central cores certain tasks that can be executed by dedicated peripheral engines. At the same time, these compute engines leverage the fast and direct connection to the flash storage. Functions could be things that are data intensive related to erasure coding, compression, encryption and KV store.
CSS is available for x86/Linux server and fully addressable via ScaleFlux software module. The engines are exposed via APIs offered by this SW module.
Device | Form factor |
Capacity (TB) |
Random Sustained R/W K IO/s |
Sequential R/W MB/s |
Max Power |
Endurance DWPD |
CSSP2Px016B0 | PCIe HHHL Card | 1.6 | 500/100 | 3000/2000 | 25 | 3/5/10 |
CSSP2Px032B0 | PCIe HHHL Card | 3.2 | 600/150 | 3000/2400 | 25 | 3/5/10 |
CSSP2Px064B0 | PCIe HHHL Card | 6.4 | 600/150 | 3000/2800 | 25 | 3/5/10 |
CSSU2Px016B0 | U.2 | 1.6 | 500/100 | 3000/2000 | 25 | 3/5/10 |
CSSU2Px032B0 | U.2 | 3.2 | 600/150 | 3000/2400 | 25 | 3/5/10 |
CSSU2Px064B0 | U.2 | 6.4 | 600/150 | 3000/2800 | 25 | 3/5/10 |