Renesas: Fast 40nm Flash Technology

Renesas Electronics Corporation has developed a split gate (SG) flash memory circuit technology for on-chip flash memory microcontrollers (MCUs) that adopts the 40nm process technology, achieving  reliability, low power consumption and fast random access operation speeds.

In addition to higher level control, equipment that requires high reliability, e.g., automotive, is also now requiring  higher functionality and diversity of functions, such as support for functional safety, security, and networking. Along with such market demands, since even larger capacities are required in the flash memory that stores the MCU’s software and data, it is seen as desirable to increase the integration density of both the flash memory and peripheral functions included on a single chip by the use of even finer features in the fabrication process.

To support these needs, Renesas continues to develop solutions based on advanced process technologies, and starts sample shipments from 2Q CY2013 of automotive flash MCUs that adopt both the 40nm process for flash MCUs and the SG-MONOS structure flash memory, which has a proven track record in terms of high reliability, high speed, and low power consumption.

MONOS (metal oxide nitride oxide silicon) is a memory transistor (memory cell) structure in which there is a three-layer oxide/nitride/oxide structure formed on a silicon substrate and the control gates (metal) are formed on top of that. Over 20 years ago, Renesas included MONOS technology in IC card memory products. Based on this  track record, Renesas developed SG-MONOS, which is a MONOS technology in which the gate electrode is split into two to form a split gate (SG), and is now incorporating this technology in MCUs as an SG-MONOS type flash memory, which achieves  reliability, fast operation and low power consumption.

Key Features of the SG-MONOS Flash Memory Technology:

• Circuit technologies achieve even faster readout: If the offset voltage of the sense amplifier that amplifies the read data is large, the time for reading data from the cell will be correspondingly long. Renesas has developed a sense amplifier that can largely cancel the offset voltage using a correction current, thus increasing the random access speed.
• Circuit technologies achieve high rewrite durability: Renesas has developed a variable control method that, during write operations, adapts the current applied to the cell according to the progress of the write operation. It also developed a technology for use during erase operations, dynamically controlling the pulse application time to be optimal by monitoring the voltage level applied to the cell. These two developments enable faster rewrite operations and reduce the voltage stress applied to the cell during rewrite, thus allowing the number of rewrite cycles to be increased.

Using these new technologies, Renesas has prototyped both 4MB program storage flash memory and a 64KB storage flash memory fabricated in a 40nm generation process, and has achieved operation at over 160MHz and high readout speed of 5.1GB/s. Previously, it verified operation at up to 120MHz in its 40nm generation process products. Leveraging these  technologies, Renesas has now verified a 33% characteristics improvement. Also, in storage flash memory, this technology achieved 10 million rewrite cycles, a critical issue in automotive MCUs, even under the high-temperature conditions of Tj = 170°C. This indicates that 40nm automotive flash memory has great potential in terms of rewrite cycle counts.

Renesas presented these results on February 19 during a session at ISSCC 2013 (International Solid-State Circuits Conference 2013), which took place in San Francisco, CA, February 17-21, 2013.