Third-Generation Marvell SSD 6Gb SATA Controller

Marvell Semiconductor, Inc. announced mass deployment of the 88SS9187 SATA controller fueled by high performance embedded processor technology.

The 88SS9187 features a 6Gb/s SATA Revision 3.1 compliant host interface optimized for the growing SSD sector, offering game changing benefits to the consumer, mobile and enterprise markets. A number of SSD manufacturers are set to deploy this new solution immediately, with additional partners expected to integrate its implementations later this year.

The new SSD controller boasts an open architecture that supports high-speed NAND Flash interface up to 200MB/s per channel. It also offers a correction capability thanks to its ECC engine with Adaptive Read and Write Scheme and on-chip RAID functionality to allow use of the latest generation of NAND Flash devices.

"We continue to drive market-leading innovation in our SATA technology products, as seen with today’s launch of the 88SS9187 SATA controller powered by high performance embedded processor technology," said Alan Armstrong, vice president of Marketing for the Storage Business Group at Marvell. "The best-in-class, open architecture of the device allows SSD manufacturers to fully customize their products to meet specific customer demands and distinguish their products based on price, performance, power and functionality. Marvell is thrilled to be leading the industry with our advanced SSD acceleration technology, which is enabling our partners to take their products to the next level."

In addition to its performance, the 88SS9187 delivers lower costs and power efficiency. The device features low active and stand-by power consumption rates at this performance level, meeting the requirements of the demanding Ultrabook computer market.

Other features of SATA 6 Gb/s SSD controller include:

• Supports on-chip RAID technology for the NAND device with customer firmware based algorithm to optimize retiring of defective NAND block, plane, die or device.
• Supports high-speed DDR3 DRAM interface with support for up to 1G byte memory that permits customer to implement performance optimized mapping algorithms.
• Maximum sequential read performance for a SATA 6G device.
• 500MB/s of sequential write performance even at dirty drive conditions.
• Random read and write IOPS with minimum over-provisioning and minimal performance degradation.