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R&D: Modeling and Simulating Emerging Memory Technologies, a Tutorial

Tutorial presents a simulation toolchain through four detailed case studies, showcasing its applicability to various domains of system design, including hybrid main-memory and cache, compute-in-memory, and wear-leveling design.

ArXiv has published an article written by Yun-Chih Chen, Tristan Seidl, Nils Hölscher, Christian Hakert, Minh Duy Truong, Jian-Jia Chen, TU Dortmund University, Germany,, João Paulo C. de Lima, Asif Ali Khan, Jeronimo Castrillon, Technische Universität, Dresden, ScaDS.AI, Germany, Ali Nezhadi, Lokesh Siddhu, Hassan Nassar, Mahta Mayahinia, Mehdi Baradaran Tahoori, Jörg Henkel, Karlsruhe Institute of Technology (KIT), Germany, Nils Wilbert, Stefan Wildermann, and Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany

Abstract: Non-volatile Memory (NVM) technologies present a promising alternative to traditional volatile memories such as SRAM and DRAM. Due to the limited availability of real NVM devices, simulators play a crucial role in architectural exploration and hardware-software co-design. This tutorial presents a simulation toolchain through four detailed case studies, showcasing its applicability to various domains of system design, including hybrid main-memory and cache, compute-in-memory, and wear-leveling design. These case studies provide the reader with practical insights on customizing the toolchain for their specific research needs. The source code is open-sourced.

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