R&D: Scalable Integration Process for Ultrafast 2D Flash Memory

Nature Electronics has published an article written by Yongbo Jiang, Chunsen Liu, Zhenyuan Cao, Chuhang Li, Zizheng Liu, Chong Wang, Yutong Xiang, State Key Laboratory of Integrated Chip and Systems, School of Microelectronics, Frontier Institute of Chip and System, Fudan University, Shanghai, China, and Peng Zhou, State Key Laboratory of Integrated Chip and Systems, School of Microelectronics, Frontier Institute of Chip and System, Fudan University, Shanghai, China, and Shaoxin Laboratory, Shaoxing, China.

Abstract: “Data-driven computing is highly dependent on memory performance. Flash memory is presently the dominant non-volatile memory technology but suffers from limitations in terms of speed. Two-dimensional (2D) materials could potentially be used to create ultrafast flash memory. However, due to interface engineering problems, ultrafast non-volatile performance is presently restricted to exfoliated 2D materials, and there is a lack of performance demonstrations with short-channel devices. Here, we report a scalable integration process for ultrafast 2D flash memory that can be used to integrate 1,024 flash-memory devices with a yield of over 98%. We illustrate the approach with two different tunnelling barrier configurations of the memory stack (HfO₂/Pt/HfO₂ and Al₂O₃/Pt/Al₂O₃) and using transferred chemical vapour deposition-grown monolayer molybdenum disulfide. We also show that the channel length of the ultrafast flash memory can be scaled down to sub-10 nm, which is below the physical limit of silicon flash memory. Our sub-10 nm devices offer non-volatile information storage (up to 4 bits) and robust endurance (over 10⁵).“