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R&D: Ultrafast Multibit Memory Based on ReS2/h-BN/Graphene Heterostructure

Device exhibits both electrically and optically tunable multilevel NVM behavior, by controlling voltage and light pulse parameters, device achieves an electrical memory state of 130 levels (>7 bits) and optical memory state of 45 levels (>5 bits).

ACS Nano has published an article written by Haoyue Lu, Yan Wang, Xuchen Han, and Jing Liu, State Key Laboratory of Precision Measurement Technology and Instrument, School of Precision Instruments and Optoelectronics Engineering, Tianjin University, No. 92 Weijin Road, Tianjin 300072, China.

Abstract: The exponential growth of data in the big data era has made it imperative to improve the data storage density and calculation speed. Therefore, the development of a multibit memory with an ultrafast operational speed is of great significance. In this work, a floating-gate (FG) memory based on the ReS2/h-BN/graphene van der Waals heterostructure is reported. The device exhibits ultrafast and multilevel nonvolatile memory characteristics, notably featuring an exceptionally large memory window of 113.36 V, a substantial erasing/programming current ratio of 107, an ultrafast operational speed of 30 ns, outstanding endurance exceeding 1000 cycles, and retention performance exceeding 1100 s. Furthermore, the device exhibits both electrically and optically tunable multilevel nonvolatile memory behavior. By controlling the voltage and light pulse parameters, the device achieves an electrical memory state of 130 levels (>7 bits) and an optical memory state of 45 levels (>5 bits).

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