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Ememory Technology Assigned Eight Patents

Sensing device for NVM, driving circuit for NVM, MRAM for physically unclonable function technology and associated random code generating method, erasable programmable single-ploy NVM cell and associated array structure, NVM cell and NVM cell array, resistive memory device and forming method thereof with improved forming time and improved forming uniformity, program control circuit for antifuse-type one time programming memory cell array, memory cell of NVM

Sensing device for NVM
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (12027214) developed by Chang; Che-Wei, Hsinchu County, Taiwan, for a sensing device for non-volatile memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A sensing device for a non-volatile memory includes a reference circuit, two switches, a sensing circuit and a judging circuit. The reference circuit is connected to a first node. A first terminal of the first switch is connected with the first node and a control terminal of the first switch receives an inverted reset pulse. A first terminal of the second switch is connected with the first node, a second terminal of the second switch receives a ground voltage, and a control terminal of the second switch receives a reset pulse. The sensing circuit is connected between the second terminal of the first switch and a second node. The sensing circuit generates a first sensed current. The judging circuit is connected to the second node. The judging circuit receives the first sensed current and generates an output data according to the first sensed current.

The patent application was filed on 2022-09-21 (17/949255).

Driving circuit for NVM
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (12014783) developed by Po; Chen-Hao, Hsinchu County, Taiwan, for a driving circuit for non-volatile memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A driving circuit includes a cross coupled circuit, a first conducting device, a second conducting device, a first switching device, a second switching device, a first selecting device and a second selecting device. The first conducting device is connected between a first node and a second node. The second conducting device is connected between a third node and a fourth node. The cross coupled circuit receives a first supply voltage and is connected with the first node and the second node. The first switching device is connected between the second node and a fifth node. The second switching device is connected between the fourth node and a sixth node. The first and second selecting devices are respectively connected with the fifth node and the sixth node. Each of the first and second selecting devices receives a second supply voltage and a third supply voltage.

The patent application was filed on 2022-08-02 (17/878948).

Magnetoresistive random access memory for physically unclonable function technology and associated random code generating method
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11980026) developed by Lai; Tsung-Mu, Lo; Chun-Yuan, and Chao; Chun-Chieh, Hsinchu County, Taiwan, for magnetoresistive random access memory for physically unclonable function technology and associated random code generating method.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A random code generating method for the magnetoresistive random access memory is provided. Firstly, a first magnetoresistive random access memory cell and a second magnetoresistive random access memory cell are programmed into an anti-parallel state. Then, an initial value of a control current is set. Then, an enroll action is performed on the first and second magnetoresistive random access memory cells. If the first and second magnetoresistive random access memory cells fail to pass the verification action, the control current is increased by a current increment, and the step of setting the control current is performed again. If the first and second magnetoresistive random access memory cells pass the verification action, a one-bit random code is stored in the first magnetoresistive random access memory cell or the second magnetoresistive random access memory cell.

The patent application was filed on 2022-06-14 (17/839519).

Erasable programmable single-ploy NVM cell and associated array structure
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11980029) developed by Chen; Hsueh-Wei, Hsinchu County, Taiwan, for erasable programmable single-ploy non-volatile memory cell and associated array structure.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An erasable programmable single-poly non-volatile memory cell and an associated array structure are provided. The memory cell comprises a select transistor and a floating gate transistor. The floating gate of the floating gate transistor and an assist gate region are collaboratively formed as a capacitor. The floating gate of the floating gate transistor and an erase gate region are collaboratively formed as another capacitor. Moreover, the select transistor, the floating gate transistor and the two capacitors are collaboratively formed as a four-terminal memory cell. Consequently, the size of the memory cell is small, and the memory cell is operated more easily.

The patent application was filed on 2022-08-09 (17/883652).

NVM cell and NVM cell array
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11972800) developed by Chen; Chih-Chun, and Lin; Chun-Hung, Hsinchu County, Taiwan, for non-volatile memory cell and non-volatile memory cell array.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A non-volatile memory cell includes a first select transistor, a first floating gate transistor, a second floating gate transistor and a second select transistor. The first select transistor is connected with a program source line and a program word line. The first floating gate transistor includes a floating gate. The first floating gate transistor is connected with the first select transistor and a program bit line. The second floating gate transistor includes a floating gate. The second floating gate transistor is connected with a read source line. The second select transistor is connected with the second floating gate transistor, the read word line and the read bit line. The floating gate of the second floating gate transistor is connected with the floating gate of the first floating gate transistor.

The patent application was filed on 2022-08-16 (17/888526).

Resistive memory device and forming method thereof with improved forming time and improved forming uniformity
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11915749) developed by Lin; I-Lang, Hsinchu County, Taiwan, for resistive memory device and forming method thereof with improved forming time and improved forming uniformity.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A resistive memory device includes word lines, first memory cells, second memory cells, bit lines, source lines, and a driver. The driver provides a forming voltage to the first memory cells and the second memory cells through the bit lines and the source lines in a forming process. A first connection length along the bit lines and the source lines between the first memory cells and the driver is longer than a second connection length along the bit lines and the source lines between the second memory cells and the driver. The forming process is performed to the first memory cells before the forming process is performed to the second memory cells. A first value of the forming voltage provided to the first memory cells is less than a second value of the forming voltage provided to the second memory cells.

The patent application was filed on 2022-03-22 (17/655793).

Program control circuit for antifuse-type one time programming memory cell array
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11881274) developed by Chang; Chia-Fu, Wang; Po-Ping, and Peng; Jen-Yu, Hsinchu County, Taiwan, for a program control circuit for antifuse-type one time programming memory cell array.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A program control circuit for an antifuse-type one time programming memory cell array is provided. When the program action is performed, the program control circuit monitors the program current from the memory cell in real time and increases the program voltage at proper time. When the program control circuit judges that the program current generated by the memory cell is sufficient, the program control circuit confirms that the program action is completed.

The patent application was filed on 2022-06-17 (17/842835).

Memory cell of NVM
Ememory Technology Inc., Hsin-Chu, Taiwan, has been assigned a patent (11877456) developed by Chen; Ying-Je, Sun; Wein-Town, Li; Chun-Hsiao, and Chen; Hsueh-Wei, Hsinchu County, Taiwan, for a memory cell of non-volatile memory.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory cell of a non-volatile memory includes a memory element. The memory element is a transistor. The memory element includes an asymmetric spacer. In the memory element, a channel under the wider part of the spacer is longer. When the program operation of the memory element is performed, more carriers are injected into a charge-trapping layer of the spacer through the longer channel. Consequently, the program operation of the memory element is performed more efficiently, and the time period of performing the program operation is reduced.

The patent application was filed on 2021-07-21 (17/381468).

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