FMS 2024: XConn Technologies and MemVerge Demo Scalable CXL Memory Sharing Solution

XConn Technologies and MemVerge, Inc. will be demonstrating an industry’s 1st scalable CXL memory sharing solution during the Future of Memory and Storage (FMS) 2024, at Santa Clara Convention Center, CA.

Together, they will showcase how CXL technology can be used to improve performance and reduce TCO for AI, data analytics, in-memory databases and other HPC applications.

“Our benchmarking shows that CXL memory sharing is an exceptionally effective solution to improve the performance and reduce the TCO for in-memory databases such as SAP HANA,” said Gerry Fan, CEO, XConn. “During FMS, we will further demonstrate, with MemVerge, the dramatic performance impact CXL memory sharing can have for AI applications, especially for inference of various AI models. By combining MemVerge’s intelligent tiering software with XConn’s high performance CXL interconnect switch, we are showing just how effective CXL is at accelerating high demand applications.” 

“XConn opens the door to a new tier of memory attached to a switched fabric that will accelerate CXL adoption across a variety of use cases,” said Charles Fan, CEO, and co-founder, MemVerge. “MemVerge software unlocks the performance potential of fabric-attached memory by allowing applications to share memory, and we’re excited to be partnering with XConn in the industry’s first demonstration of a scalable CXL memory sharing solution during FMS 2024.”

Now sampling, the XConn ‘Apollo’ CXL switch is the industry’s 1st CXL 2.0 interconnect solution that also works with shipping CXL 1.1 server processors from Intel and AMD. Designed to accelerate the system design process to power the future of AI-enabled computing, the XConn ‘Apollo’ CXL 2.0 switch has become the industry standard solution to support environments that want to take advantage of a CXL Memory Pool to remove traditional memory barriers and revolutionize memory architecture.

Innovative in its design, the XConn Apollo switch offers system developers the opportunity to future-proof devices to capitalize on the breakthrough performance of new CXL interconnect technology with the industry’s first CXL 2.0 switch, while also supporting PCIe 5.0 standards. Both PCIe and CXL can be supported in a single design. With 2,048GB/s of total bandwidth and 256 lanes, the chip offers flexibility for system designers that want to capitalize on JBOG (Just-a-Bunch-Of-GPUs) and JBOA (Just-a-Bunch-Of-Accelerators) processing configurations. 

JP Jiang, SVP, product marketing and management, Xconn, will share more on the benefits of the industry’s first scalable CXL memory sharing solution in his FMS presentation, A Solution of CXL Memory Sharing and Pooling System and Performance Study, to be presented during the CXL Memory Pooling session on Wednesday, August 7.

MemVerge Memory Machine for CXL is the big memory platform that manages the memory-storage hierarchy for agile server memory expansion and fabric-attached memory.

Available in early production samples, XConn Apollo delivers full support for CXL 2.0, is backwards compatible with CXL 1.1 and supports PCIe Gen 5 in hybrid mode.