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FMS 2024: Prodigy PGY-PCIeGen5-PA PCIe Gen5 Protocol Analyzer

Enables engineers to capture, decode, and analyze PCIe Gen5 traffic at speeds up to 32GT/s, accelerating development and validation of high-speed PCIe interfaces.

Prodigy Technovations announced its PGY-PCIeGen5-PA, PCIe Gen5 Protocol Analyzer.

Pcie Gen5 Protocol Analyzer Intro

This solution enables engineers to capture, decode, and analyze PCIe Gen5 traffic at speeds up to 32GT/s, accelerating the development and validation of high-speed PCIe interfaces.

The PGY-PCIeGen5-PA represents an advancement in PCIe protocol analysis,” said Godfree Coelho, CEO. “By providing unparalleled visibility into PCIe Gen5 traffic, easy to set up, captures 32Gb/s PCIe traffic, compact and quickly monitors entry and exit from low power states. We empower engineers to quickly identify and resolve design issues, ultimately reducing time-to-market.

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Powerful Pcie Gen5 Protocol Analyzer Infographic

The PGY-PCIeGen5-PA offers a set of features, including simultaneous protocol analysis of 2.5, 5, 8, 16, and 32GT/s traffic, advanced if-then-else trigger capabilities based on TS1, TS2, DLLP, TLP packet content, and sideband signals. Software provides in-depth analysis of captured traces for PCIe and NVMe protocol. With support for M.2, CEM, U.2, E1.S, and SD Express interposers, the analyzer adapts to various PCIe interface types.

Key features of PGY-PCIeGen5-PA include:

  • Real-time LTSSM decoding

  • Detailed result view for 32Gb TLPs, DLLPs, and analytical analysis

  • NVMe view with direct link to TLPs

  • Sideband signal monitoring and low power states

  • Advanced multi-level if-then-else trigger conditions

Prodigy Pcie Setup Scaled

The PGY-PCIeGen5-PA is available for engineers at the PCI-SIG Compliance Workshop in San Francisco, CA, USA, from July 29 to August 2, 2024, and at FMS: the Future of Memory and Storage, in Santa Clara, CA, from August 6-8, 2024.

The SD Association is pleased to see the development of the PGY-PCIeGen3/4/5-PA, that will play a crucial role in enabling the adoption of SD Express technology,” said Yosi Pinto, chairman, board and technical committee chair, SD Association. “This important tool will help our members accelerate the design and validation of SD Express-based products with the help of SD Express Interposers.

The PGY-PCIeGen5-PA is available for evaluation and purchase.

Video: PCIe Gen 5 Protocol Analyzer Demo

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