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Synopsys Assigned Patent

Embedded memory transparent in-system built-in self-test

Synopsys, Inc., Sunnyvale, CA, has been assigned a patent (12002530) developed by Tshagharyan; Grigor, Harutyunyan; Gurgen, Shoukourian; Samvel, Yerevan, Armenia, and Zorian; Yervant, Santa Clara, CA, for an embedded memory transparent in-system built-in self-test.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory transparent in-system built-in self-test may include performing in-system testing on subsets of memory cells over one or more test intervals of one or more test sessions. A test interval may include copying contents of a subset of memory cells to a register(s), writing test data (e.g., a segment of a pattern) to the subset of memory cells, reading back contents of the subset of memory cells, and restoring the content from the register(s) to the subset of memory cells. In-system testing may be performed on overlapping sets of memory cells. In-system testing may be performed on successive subsets of memory cells within a row (i.e., fast column addressing) and/or within a column (fast column addressing). In-system testing may be performed on sets of m blocks of memory cells during respective test intervals. The number of m blocks tested per interval may be configurable/selectable.

The patent application was filed on 2022-10-31 (17/977599).

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