Semicon Japan: Advantest Targets NAND Flash/NVM Market with Group of Memory Test Products

Advantest Corp. announced 3 additions to its suite of memory test products.

 T5230 memory wafer test system

These offerings are designed to target NAND flash and NVM devices, which face extreme pressure to bring down test costs and cost of ownership on the test floor. These products include the T5230 memory wafer test solution; the STM32G 3rd-gen protocol NAND system-level test module for the T5851 memory tester; and the T5835 high-speed wafer-sort interface option.

The T5230 memory test system for NAND/NVM devices adopts a combined array architecture to achieve cost-of-test performance for wafer test, including wafer-level burn-in (WLBI) and built-in self-test (BIST). The system can perform on-wafer test of 1,024 memory devices/test head in parallel, delivering high productivity and enabling floor space savings of up to 86%. Multiple test cells are connected per system controller in the T5230, allowing independent wafer test of each test cell. The test cells can be stored in a general multi-wafer prober while minimizing the test cell floor space, and the tester can be docked with probers in both linear and multi-stack configurations. For functional tests at a maximum test rate of 125MHz/250Mb, the T5230 assures high timing accuracy, repeatability, and failure detection capability.

T5851-STM32G system

The T5851-STM32G module is designed to cover the latest-gen of protocol NAND devices, including UFS4.0 and PCIe Gen 5 ball grid array (BGA) packaged devices for high-speed system-level NAND testing at up to 32Gb. Upgradeable and compatible with existing T5851 systems, the new module delivers tester-per-DUT (device under test) performance and is qualified for high-volume manufacturing, qualification, reliability and characterization.

T5835 memory test system

Created as an option for the T5835 multifunction memory test system, the new high-speed wafer-sort interface enables fast NAND flash/NVM wafer probing (up to 5.4Gb/s) with 4,096 full I/O channels. Raw NAND die inside SSDs require increasingly higher-speed functionality, necessitating evaluation and test of die performance at the wafer level, not just in package-level final test. The solution delivers high-speed probe interface with wafer-level evaluation of memory core test functionalities during engineering production, contributing to the T5835’s overall value by delivering wider test coverage.

“High-volume storage is driving growth in the market for non-volatile memories, which experts predict will reach US$167 billion by 2032. Makers of the NAND flash and nonvolatile memories crucial to these drives need fast, reliable solutions to test their devices that won’t drive up test costs,” said Suzuki Masayuki, EVP, memory business unit. “With these new solutions added to our high-value memory test arsenal, Advantest is enabling customers to pursue new memory test strategies that will help them meet tightening market demand.”

The company’s line of automated test equipment and materials will be exhibiting at SEMICON Japan 2023, December 13-15, Tokyo Big Sight, Japan.