MemVerge and SK hynix Launches Project Endless Memory Co-Engineered System

MemVerge, Inc. announced that the company and SK hynix Inc. have launched Project Endless Memory, a co-engineered system that addresses the challenge of memory exhaustion in data-intensive applications.

Memory exhaustion is a major problem that can cause Out-of-Memory (OOM) crashes or poor performance due to swap usage, especially in clustered environments where memory usage is not uniform across nodes. An overview of Endless Memory was presented at the CXL Forum at ISC on Tuesday, May 23. Demonstrations of Endless Memory are being presented at ISC in MemVerge booth.

To address this challenge, MemVerge has partnered with SK hynix to create an ‘Endless Memory’ solution that combines an ‘Elastic Memory Service’ software from MemVerge and a Niagara Pooled Memory system from SK hynix to allow hosts to dynamically allocate memory as needed, mitigating OOM errors and improving application performance.

“Our collaboration modernizes the existing memory model to improve application performance and prevent OOM errors,” said Charles Fan, CEO and co-founder, MemVerge. “The ability to download RAM automatically and intelligently will lead to improved productivity for users of data-intensive applications.”

Endless Memory represents an industry milestone because it features CXL memory pooling and tiering technologies running on real CXL memory pooling hardware from SK hynix. The solution incorporates technology that transforms the way data-intensive applications are managed and will provide a more seamless and efficient way to manage memory in clustered environments.

According to Hoshik Kim, VP and fellow, memory forest x&D, SK hynix, “Testing shows that just 20% extra CXL memory from our Niagara Pooled Memory System ⁽¹⁾ can improve application performance by 3x compared with the existing swap memory approach.“

Project Endless Memory is set to change the way we manage memory for data-intensive application.

^[1] Niagara Pooled Memory System: FPGA based CXL Pooled Memory Prototype