Ferroelectric Memory Assigned Two Patents

Threshold switch structure and memory cell arrangement
Ferroelectric Memory GmbH, Dresden, Germany, has been assigned a patent (11605435) developed by Schenk, Tony, Dresden, Germany, for “threshold switch structure and memory cell arrangement.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Various aspects relate to a threshold switch structure and a use of such threshold switch structure as a threshold switch in a memory cell arrangement, the threshold switch structure including: a first electrode, a second electrode, a switch element in direct physical contact with the first electrode and the second electrode, the switch element including a layer of a spontaneously polarizable material. The first electrode, the second electrode, and the switch element are configured to allow for a switching of the switch element between a first electrical conductance state and a second electrical conductance state as a function of a voltage drop provided over the switch element by the first electrode and the second electrode.”

The patent application was filed on 2021-07-19 (17/379168).

Memory cell driver, memory cell arrangement, and methods
Ferroelectric Memory GmbH, Dresden, Germany, has been assigned a patent (11594271) developed by Noack, Marko, and Jähne, Rolf, Dresden, Germany, for “memory cell driver, memory cell arrangement, and methods thereof.“

The abstract of the patent published by the U.S. Patent and Trademark Office states: “In various embodiments, a memory cell arrangement is provided including a memory cell driver and one or more memory cells, wherein one or more control nodes of each of the one or more memory cells are electrically conductively connected to one or more output nodes of the memory cell driver. The memory cell driver may include: a first supply node to receive a first supply voltage and a second supply node to receive a second supply voltage, a plurality of input nodes to receive a plurality of input voltages, one or more output nodes, and a logic circuit connected to the first supply node, the second supply node, the plurality of input nodes, and the one or more output nodes, wherein the logic circuit includes one or more logic gates and is configured to connect via the one or more logic gates either the first supply node or the second supply node to the one or more output nodes in response to the plurality of input voltages.”

The patent application was filed on 2020-04-29 (16/861640).