Samsung Electronics Demos In-Memory Computing Based on MRAM

Samsung Electronics Co., Ltd. announced its demonstration of the world’s first in-memory computing based on MRAM (Magnetoresistive Random Access Memory).

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The paper on this innovation was published online by Nature on January 12 (GMT), and is set to be published in the upcoming print edition of Nature. Titled A crossbar array of magnetoresistive memory devices for in-memory computing, this paper showcases the company’s leadership in memory technology and its effort to merge memory and system semiconductors for next-gen AI chips.

The research was led by Samsung Advanced Institute of Technology (SAIT) in collaboration with Samsung Electronics Foundry Business and Semiconductor R&D Center. The first author of the paper, Dr. Seungchul Jung, staff researcher, SAIT, and the co-corresponding authors Dr. Donhee Ham, fellow, SAIT and professor, Harvard University, and Dr. Sang Joon Kim, VP, technology, SAIT, spearheaded the research.

In the standard computer architecture, data is stored in memory chips and data computing is executed in separate processor chips.

In contrast, in-memory computing is a new computing paradigm that seeks to perform both data storage and data computing in a memory network. Since this scheme can process a large amount of data stored within the memory network itself without having to move the data, and also because the data processing in the memory network is executed in a highly parallel manner, power consumption is substantially reduced. In-memory computing has thus emerged as one of the promising technologies to realize next-gen low-power AI semiconductor chips.

For this reason, research on in-memory computing has been intensely pursued WW. Non-volatile memories, in particular RRAM (Resistive Random Access Memory) and PRAM (Phase-change Random Access Memory), have been actively used for demonstrating in-memory computing. By contrast, it has so far been difficult to use MRAM – another type of non-volatile memory – for in-memory computing despite MRAM’s merits such as operation speed, endurance, and large-scale production. This difficulty stems from the low resistance of MRAM, due to which MRAM cannot enjoy the power reduction advantage when used in the standard in-memory computing architecture.

The researchers have provided a solution to this issue by an architectural innovation. Concretely, they succeeded in developing an MRAM array chip that demonstrates in-memory computing, by replacing the standard, ‘current-sum’ in-memory computing architecture with a new, ‘resistance sum’ in-memory computing architecture, which addresses the problem of small resistances of individual MRAM devices.

Samsung’s research team subsequently tested the performance of this MRAM in-memory computing chip by running it to perform AI computing. The chip achieved an accuracy of 98% in classification of hand-written digits and a 93% accuracy in detecting faces from scenes.

By ushering MRAM – the memory which has already reached commercial-scale production embedded in the system semiconductor fabrication  into the realm of in-memory computing, this work expands the frontier of the next-generation low-power AI chip technologies.

The researchers have also suggested that not only can this new MRAM chip be used for in-memory computing, but it also can serve as a platform to download biological neuronal networks. This is along the line of the neuromorphic electronics vision that the firms researchers recently put forward in a perspective paper published in the September 2021 issue of the journal Nature Electronics.

(From left to right) Dr. Donhee Ham, fellow of SAIT and professor of Harvard University,
Dr. Seungchul Jung, staff researcher at SAIT and
Dr. Sang Joon Kim, VP, Technology at SAIT

“In-memory computing draws similarity to the brain in the sense that in the brain, computing also occurs within the network of biological memories, or synapses, the points where neurons touch one another,” said Dr. Seungchul Jung, first author of paper. “In fact, while the computing performed by our MRAM network for now has a different purpose from the computing performed by the brain, such solid-state memory network may in the future be used as a platform to mimic the brain by modelling the brain’s synapse connectivity.”

As highlighted in this work, by building on its leading memory technology and merging it with system semiconductor technology, Samsung plans to continue to expand its leadership in next-generation computing and AI semiconductors.

Article : A crossbar array of magnetoresistive memory devices for in-memory computing

Nature has published an article written by Seungchul Jung, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, Hyungwoo Lee, Sungmeen Myung, Hyunsoo Kim, Seung Keun Yoon, Soon-Wan Kwon, Yongmin Ju, Minje Kim, Wooseok Yi, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, Shinhee Han, Baeseong Kwon, Boyoung Seo, Foundry Business, Samsung Electronics, Yongin-si, South Korea, Kilho Lee, Semiconductor R&D Center, Samsung Electronics, Hwaseong-si, South Korea, Gwan-Hyeob Koh, Semiconductor R&D Center, Samsung Electronics, Hwaseong-si, South Korea Kangho Lee, Foundry Business, Samsung Electronics, Yongin-si, South Korea, Yoonjong Song, Semiconductor R&D Center, Samsung Electronics, Hwaseong-si, South Korea, Changkyu Choi, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, Donhee Ham, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea, and John A. Paulson School of Engineering and Applied Sciences, Harvard University, Cambridge, MA, USA, Sang Joon Kim, Samsung Advanced Institute of Technology, Samsung Electronics, Suwon-si, South Korea.

Abstract: “Implementations of artificial neural networks that borrow analogue techniques could potentially offer low-power alternatives to fully digital approaches. One notable example is in-memory computing based on crossbar arrays of non-volatile memories that execute, in an analogue manner, multiply–accumulate operations prevalent in artificial neural networks. Various non-volatile memories—including resistive memory, phase-change memory and flash memory have been used for such approaches. However, it remains challenging to develop a crossbar array of spin-transfer-torque magnetoresistive random-access memory (MRAM),  despite the technology’s practical advantages such as endurance and large-scale commercialization. The difficulty stems from the low resistance of MRAM, which would result in large power consumption in a conventional crossbar array that uses current summation for analogue multiply–accumulate operations. Here we report a 64 × 64 crossbar array based on MRAM cells that overcomes the low-resistance issue with an architecture that uses resistance summation for analogue multiply–accumulate operations. The array is integrated with readout electronics in 28-nanometre complementary metal–oxide–semiconductor technology. Using this array, a two-layer perceptron is implemented to classify 10,000 Modified National Institute of Standards and Technology digits with an accuracy of 93.23 per cent (software baseline: 95.24 per cent). In an emulation of a deeper, eight-layer Visual Geometry Group-8 neural network with measured errors, the classification accuracy improves to 98.86 per cent (software baseline: 99.28 per cent). We also use the array to implement a single layer in a ten-layer neural network to realize face detection with an accuracy of 93.4 per cent.“