Weebit Nano and Leti Filed Patent on Method to Implement Multi-Level Storage in ReRAM
Multi-level is ability to store more than 1 bit per cell, increasing storage capacity without increasing number of memory cells or memory array size.
This is a Press Release edited by StorageNewsletter.com on September 1, 2020 at 2:04 pmWeebit Nano Ltd. and its development partner Leti, the French research institute recognised as a global leader in the field of micro-electronics, filed a patent to further protect the IP of its silicon oxide (SiOx) ReRAM technology.
The patent defines an method to implement multi-level storage in ReRAM. Multi-level is the ability to store more than one bit per cell, thus increasing the memory storage capacity without increasing the number of memory cells or the memory array size, making the memory much more cost-efficient.
This patent uses the variability characteristics of ReRAM memory cells to increase the number of resistance levels that can be tuned by the ReRAM. While this method is based on the company’s SiOx-based ReRAM, importantly, it can also be extended to any ReRAM technology.
Coby Hanoch, CEO, Weebit Nano, said: “Our close collaboration with our partners at Leti has allowed us to develop a method that is an important step in creating a MLC which can improve our cost competitiveness. In parallel to the ongoing productisation activity we are continuing to improve the technology to make it even more attractive to customers.
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