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Radian Memory Systems Assigned Patent

Memory controller for flash memory with zones configured on die bounaries and with separate spare management per zone

Radian Memory Systems, Inc., Calabasas, CA, has been assigned a patent (10,642,748) developed by Lercari, Robert, Thousand Oaks, CA, Chen, Alan, Simi Valley, CA, Jadon, Mike, Manhattan Beach, CA, Robertson, Craig, Simi Valley, CA, and Kuzmin, Andrey V., Moscow, Russia, for a “memory controller for flash memory with zones configured on die bounaries and with separate spare management per zone.

The abstract of the patent published by the U.S. Patent and Trademark Office states: This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.

The patent application was filed on August 29, 2017 (15/690,006).

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