PCI-SIG: PCIe 6.0 Spec V.0.5 Available to Members

By Al Yanes, board chair and president, PCI-SIG

The PCI-SIG are starting 2020 with the release of version 0.5 of the PCIe 6.0 spec incorporating the member feedback received on version 0.3.

After momentous progress, PCI-SIG is on track to deliver the final PCIe 6.0 spec in 2021.

If you are a PCI-SIG member interested in voicing your feedback on future spec installments, we invite you to visit the members only section on the PCI-SIG website to learn more about how your company can become involved in work groups. If you haven’t yet joined PCI-SIG but are interested in shaping the future of the interconnect of choice, visit the Become a Member page.

PCIe 6.0 spec features overview:

• Data rate of 64GT/s speeds, doubling the 32GT/s data rate of the PCIe 5.0 spec

• PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding

• Low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency

• Backwards compatibility with all previous spec gens

By doubling the bandwidth and maintaining strict timeline, PCI-SIG believes that it will be able to deliver the industry’s needs for throughput aligned with their timelines. Emerging data-hungry markets like AI, ML, HPC and more, demand additional speed and capabilities that the newest PCI-SIG architecture will fulfill.

The upcoming PCI-SIG Developers Conference 2020 on June 3-4 in Santa Clara, CA, will feature technical deep dives into the PCIe 6.0 features. Registration will open in the coming months.