Astera Labs: PCIe 5.0 Retimer Technology

Astera Labs Inc. announced the Peripheral Component Interconnect PCIe 5.0 retimer technology, designed to remove performance bottlenecks and signal integrity challenges in next-gen servers.

This system-aware technology makes it possible for hyperscale data center system designers to create a server connectivity backbone tying together processors, workload accelerators and storage nodes over diverse system topologies at speeds up to 32GT/s (gigatransfers per second).

Servers have been operating with PCIe 3.0 technology for many years. With PCIe 4.0 processors entering the market and the PCIe 5.0 specification released, system designers are rapidly gearing up for the increased bandwidth enabled by these new standards.

“At 16 and 32GT/s, retimers play a crucial role to achieving diverse system topologies and accelerating the shift to blazing-fast speeds,” said Al Yanes, chairman and president, PCI special interest group (SIG).

“Heterogeneous computing and workload-optimized platforms are redefining the connectivity backbone in the next generation of servers. Specialized semiconductors will help enable this high-speed connectivity backbone and accelerate technology adoption,” said Jitendra Mohan, CEO, Astera Labs. “Our system-aware retimers are designed to empower system designers to easily upgrade from PCIe 4.0 to PCIe 5.0 technology and achieve plug-and-play interoperation without compromising interconnect topologies even at 32GT/s speeds.“

“The explosion of data and new compute-intensive workloads, like artificial intelligence and machine learning, is driving the need for faster and lower-latency interconnects in data-centric systems,” said Amber Huffman, fellow, data center group, Intel Corp. “Intel is embracing and leading the transition with its support for the new PCIe 5.0 specification and the announcement of Compute Express Link (CXL) technology. We are excited that Astera Labs has entered the ecosystem to develop purpose-built connectivity solutions to enable seamless adoption of these technologies.“