PCIe Gen3 Capable NVMe Controller IP by IP-Maker

IP-Maker, SAS, the Aix-en-Provence, France, based start-up, introduced its new version of NVMe controller IP.

PCIe Gen3 capable, this hardware architecture UNH-IOL compliant, will reduce the latency of NVMe storage systems.

“We are proud to announce the Gen3 capability at Flash Memory Summit,” said Mickael Guyard, product marketing directorat, IP-Maker. “That will help our customers to lower the latency of their products, making themready for the changes in the data center architectures, including the software defined storage (SDS) approach.”

The NVMe controller IP from the company available as a VerilogIP to be integrated in both FPGA and ASIC. Its internal scalable architecture makes it easy to support PCIe Gen2 and Gen3 configurations, up to eight lanes. The PCIe Gen3 configuration will provide an important performance increase interm of IO/s and latency. Since the latency budget coming from the NVMe IP is only few hundred of ns (thanks to its full hardware architecture), and PCIe Gen3 is the doubling the data rate compared to PCIe Gen2, a latency of about 6-7 µs only is expected on a Gen3 x4 interface.

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IP-Maker demonstrated its FPGA-based reference design at Flash Memory Summit, and explained at the conference (Software-Defined Storage track) how it can answer low latency issues in software-defined storage data center architectures.

IP-Maker is a provider in IP for high performance storage applications. Company’s NVMe technology provides a hardware accelerated solution that leverages the PCIe SSD performances, including low latency and high throughput. The company is a contributor to the NVMe specification. The ASIC and FPGA IP portfolio includes NVMe, Universal NandFlash Controller and ECC IP cores. The combination of the company’s technology and its associate services cuts time-to-market.