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Crossbar High Density 4Mb 3D RRAM for Storage-on-a-Chip

Suppressing sneak path current that interferes with reliable reading of data from individual memory cells

Achieving another milestone needed to bring terabyte storage-on-a-chip to market, Crossbar, Inc. disclosed it has solved one of challenges facing developers in achieving ultra-high density RRAM.

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In a technical presentation at IEEE International Electron Devices Meeting (IEDM) in San Francisco, CA, the company unveiled its approach to suppressing the sneak path current that interferes with reliable reading of data from individual memory cells, one of the most challenging hurdles RRAM developers are currently facing. Without the ability to suppress this sneak path current, RRAM developers are unable to deliver the high-density 3D memories arrays needed to make terabyte storage-on-a-chip possible.

When we unveiled Crossbar RRAM eighteen months ago, we laid out aggressive plans to deliver a new generation of memory capable of scaling to 1 terabyte (TB) on a chip the size of a postage stamp,” said George Minassian, CEO, Crossbar Inc. “Crossbar continues to overcome the major technical hurdles that have, in the past, kept others from bringing RRAM to market. With this latest achievement, we are one step closer to commercialization, enabling the implementation of RRAM technology in commercial products; a ground breaking achievement that will redefine what is possible with enterprise storage and high-capacity non-volatile SoC memories.

Announcement follows Crossbar’s previous technology disclosure of its patented 1TnR (1 Transistor driving n Resistive memory cell) selectivity making it possible for a single transistor to manage a very large number of interconnected memory cells, which enables high capacity solid-state storage. While 1TnR enables a single transistor to drive over 2,000 memory cells with low power, it also experiences leakage of a sneak path current that interferes with the performance and reliability of a typical RRAM array. Patented field assisted superlinear threshold selector device solves that leakage problem by utilizing a super linear threshold layer, in which a volatile conduction path is formed at the threshold voltage. This field assisted superlinear threshold device is the first selector capable of suppressing the leakage current below 0.1nA and has been demonstrated in a 4Mb integrated 3D stackable passive Crossbar array.

Without an effective way to suppress the sneak path current, high-density 3D RRAM has been technically unachievable,” said Alan Niebel, founder and CEO, Webfeet Research. “Crossbar’s selector is the first solution to overcome this design challenge, paving the way for terabyte storage-on-a-chip to become a reality and positioning RRAM as the leading next generation NAND memory replacement.

Field assisted superlinear threshold selector device
Demonstrated at IEDM, selector solves the sneak path problem by achieving the highest reported selectivity of 1010, as well as a sharp turn-on slope of less than 5mV/dec, fast turn-on and recovery (<50ns), an endurance greater than 100 million cycles, and a processing temperature less than 300°C, all ensuring commercial viability. The company was able to achieve this by developing a patent-protected special architecture in the Crossbar RRAM cells, putting them into a low-voltage state before certain thresholds, enabling a single transistor to drive over 2,000 memory cells with low power.

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Measurements on a 4Mb crossbar array with integrated patented field assisted superlinear threshold selectors show the sneak current suppressed to below 0.1nA, while maintaining a 102 memory on/off ratio and greater than 106 selectivity during cycling, making it for high density memory applications. The selectivity of the patented field assisted superlinear threshold device, and its ability to be integrated directly into each RRAM memory cell, make it possible to move beyond the density limitations of 1T1R array structures. Crossbar’s solution allows for implementation in commercial memory products, and is based on a 3D stackable 1TnR memory architecture, for high density non-volatile memory application.

When Crossbar first emerged from stealth-mode, there was no question that flash memory was runnin,ut of steam and the industry had set its sights on RRAM as the next generation technology with the most promise for high density non-volatile memory,” said Greg Wong, founder, president and principal analyst, Forward Insights. “Since then, the company has achieved major technical advances and with this announcement, we now have silicon proof of Crossbar RRAM technology and can see a potential path towards the commercialization of a next generation storage technology.

Next generation of non-volatile memory
Touted as the most promising alternatve to traditional non-volatile memory, RRAM’s simplicity, stackability and CMOS compatibility enable logic and memory to be integrated onto a single chip at the latest technology node, a capability not possible with other traditional or alternative non-volatile memory technologies. With 16x the density compared to existing memory solutions, Crossbar enables storage and retrieval in a minimal footprint and with minimal cost. Delivering 10x better endurance than current NAND solutions, RRAM will also extend the life of SSDs and other non-volatile devices.

Crossbar continues to hit the milestones necessary to bring this new generation of non-volatile memory to market. The company emerged from stealth mode in August 2013 with a working memory array at a commercial fab, and announced in June 2104 pre-production 1MB arrays using patented ‘1TnR’ selectivity for R/W operations.

This announcement represents another technical achievement, bringing Crossbar RRAM one step closer to commercialization, and fulfilling its promise to deliver a new generation of dense, reliable and high performance solid-state storage.

 

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